| Line | Branch | Exec | Source |
|---|---|---|---|
| 1 | // ====================================================================== | ||
| 2 | // \title RtcDriverHardwareStub.cpp | ||
| 3 | // \author tumbar | ||
| 4 | // \brief Stub hardware implementation for RTC peripheral (Linux/test builds) | ||
| 5 | // | ||
| 6 | // This file is compiled for Linux/test builds to enable unit testing. | ||
| 7 | // For SAMD21 target builds, RtcDriverHardware.cpp is used instead. | ||
| 8 | // ====================================================================== | ||
| 9 | |||
| 10 | #include "fprime-samd/Drv/RtcDriver/RtcDriverHardware.hpp" | ||
| 11 | |||
| 12 | namespace Samd21 { | ||
| 13 | namespace RtcHardware { | ||
| 14 | |||
| 15 | //! Global RTC state instance for stub | ||
| 16 | static RtcState g_rtc_state = { | ||
| 17 | .wakeup_interrupt = false, | ||
| 18 | .deadline_reached = false, | ||
| 19 | .deadline_exceeded = 0, | ||
| 20 | .configured = false, | ||
| 21 | .n_ticks = 0, | ||
| 22 | .rate_hz = RtcDriver::TickRate::TICK_1_HZ, | ||
| 23 | .clock_rate_hz = 0, | ||
| 24 | }; | ||
| 25 | |||
| 26 | //! Simulated RTC counter for stub | ||
| 27 | static U32 g_rtc_counter = 0; | ||
| 28 | |||
| 29 | 99 | RtcState& getRtcState() { | |
| 30 | 99 | return g_rtc_state; | |
| 31 | } | ||
| 32 | |||
| 33 | ✗ | void RtcHal::waitForGclk() { | |
| 34 | // Stub: no-op | ||
| 35 | ✗ | } | |
| 36 | |||
| 37 | ✗ | void RtcHal::waitForRtcMode0() { | |
| 38 | // Stub: no-op | ||
| 39 | ✗ | } | |
| 40 | |||
| 41 | 33 | void RtcHal::configureGclk(RtcDriver::ClockSource clock_source) { | |
| 42 | // Stub: no-op for tests | ||
| 43 | 33 | } | |
| 44 | |||
| 45 | 33 | void RtcHal::configureRtc(U32 clock_rate_hz, RtcDriver::TickRate rate) { | |
| 46 | // Stub: reset counter | ||
| 47 | 33 | g_rtc_counter = 0; | |
| 48 | 33 | } | |
| 49 | |||
| 50 | 9 | void RtcHal::enableRtc() { | |
| 51 | // Stub: no-op | ||
| 52 | 9 | } | |
| 53 | |||
| 54 | 10 | U32 RtcHal::readRtcCounter() { | |
| 55 | // Stub: return simulated counter | ||
| 56 | 10 | return g_rtc_counter; | |
| 57 | } | ||
| 58 | |||
| 59 | ✗ | void RtcHal::clearRtcInterrupt() { | |
| 60 | // Stub: no-op | ||
| 61 | ✗ | } | |
| 62 | |||
| 63 | //! Test helper: simulate an RTC interrupt | ||
| 64 | 7 | void simulateRtcInterrupt() { | |
| 65 | 7 | RtcState& state = getRtcState(); | |
| 66 | |||
| 67 |
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7 | if (!state.deadline_reached) { |
| 68 | 1 | state.deadline_exceeded++; | |
| 69 | } | ||
| 70 | |||
| 71 | 7 | state.deadline_reached = false; | |
| 72 | 7 | state.wakeup_interrupt = true; | |
| 73 | 7 | state.n_ticks++; | |
| 74 | 7 | } | |
| 75 | |||
| 76 | //! Test helper: reset RTC state for clean test runs | ||
| 77 | 35 | void resetRtcState() { | |
| 78 | 35 | g_rtc_state.wakeup_interrupt = false; | |
| 79 | 35 | g_rtc_state.deadline_reached = false; | |
| 80 | 35 | g_rtc_state.deadline_exceeded = 0; | |
| 81 | 35 | g_rtc_state.configured = false; | |
| 82 | 35 | g_rtc_state.n_ticks = 0; | |
| 83 | 35 | g_rtc_state.rate_hz = RtcDriver::TickRate::TICK_1_HZ; | |
| 84 | 35 | g_rtc_state.clock_rate_hz = 0; | |
| 85 | 35 | g_rtc_counter = 0; | |
| 86 | 35 | } | |
| 87 | |||
| 88 | //! Test helper: set counter value for time queries | ||
| 89 | 10 | void setRtcCounter(U32 counter) { | |
| 90 | 10 | g_rtc_counter = counter; | |
| 91 | 10 | } | |
| 92 | |||
| 93 | } // namespace RtcHardware | ||
| 94 | } // namespace Samd21 | ||
| 95 |